22 nm process
In-game article clicks load inline without leaving the challenge.
The "22 nm" node is the process step following 32 nm in CMOS MOSFET semiconductor device fabrication. It was first demonstrated by semiconductor companies for use in RAM in 2008. In 2010, Toshiba began shipping 24nm flash memory chips, and Samsung Electronics began mass-producing 20nm flash memory chips. The first consumer-level CPU deliveries using a 22nm process started in April 2012 with the Intel Ivy Bridge processors.
Since at least 1997, "process nodes" have been named purely on a marketing basis, and have no relation to the dimensions on the integrated circuit; neither gate length, metal pitch or gate pitch on a "22nm" device is twenty-two nanometers.
The ITRS 2006 Front End Process Update indicates that equivalent physical oxide thickness will not scale below 0.5nm (about twice the diameter of a silicon atom), which is the expected value at the 22nm node. This is an indication that CMOS scaling in this area has reached a wall at this point, possibly disturbing Moore's law.
The 20-nanometre node is an intermediate half-node die shrink based on the 22-nanometre process.
TSMC began mass production of 20nm nodes in 2014. The 22nm process was superseded by commercial 14nm FinFET technology in 2014.
Technology demos
On August 18, 2008, AMD, Freescale, IBM, STMicroelectronics, Toshiba, and the College of Nanoscale Science and Engineering (CNSE) announced that they jointly developed and manufactured a 22nm SRAM cell, built on a traditional six-transistor design on a 300mm wafer, which had a memory cell size of just 0.1 μm2. The cell was printed using immersion lithography.
The 22nm node may be the first time where the gate length is not necessarily smaller than the technology node designation. For example, a 25nm gate length would be typical for the 22nm node.
On September 22, 2009, during the Intel Developer Forum Fall 2009, Intel showed a 22nm wafer and announced that chips with 22nm technology would be available in the second half of 2011. SRAM cell size is said to be 0.092 μm2, smallest reported to date.
On January 3, 2010, Intel and Micron Technology announced the first in a family of 25nm NAND devices.
On May 2, 2011, Intel announced its first 22nm microprocessor, codenamed Ivy Bridge, using a FinFET technology called 3-D tri-gate.
IBM's POWER8 processors are produced in a 22nm SOI process.
Shipped devices
- Toshiba announced that it was shipping 24nm flash memory NAND devices on August 31, 2010.
- In 2010, Samsung Electronics began mass production of 64Gbit NAND flash memory chips using a 20nm process.
- Also in 2010, Hynix introduced a 64Gbit NAND flash memory chip using a 20nm process.
- On April 23, 2012, Intel Core i7 and Intel Core i5 processors based on Intel's Ivy Bridge 22nm technology for series 7 chipsets went on sale worldwide. Volume production of 22nm processors began more than six months earlier, as confirmed by former Intel CEO Paul Otellini on October 19, 2011.
- On June 3, 2013, Intel started shipping Intel Core i7 and Intel Core i5 processors based on Intel's Haswell microarchitecture in 22nm tri-gate FinFET technology for series 8 chipsets. Intel's 22nm process has a transistor density of 16.5 million transistors per square millimeter (MTr/mm2).