ARM Cortex-A510
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The ARM Cortex-A510 is the successor to the ARM Cortex-A55 and the first ARMv9 high efficiency "LITTLE" CPU. It is the companion to the ARM Cortex-A710 "big" core. It is a clean-sheet 64-bit CPU designed by ARM Holdings' Cambridge design team.
Design
The Cortex-A510 is a “LITTLE” CPU core focusing on high efficiency, bringing the following improvements from last gen:
- 3-wide in-order design, the Cortex-A55 was 2-wide.
- 3-wide fetch and decode front-end as well as 3-wide issue and execute on the back-end, which includes 3 ALU's.
- 35% performance uplift compared to Cortex-A55
- 20% more energy efficient than Cortex-A55
- 3x ML uplift
ARM announced a refresh for the Cortex-A510 CPU core on 28 June 2022 along with other CPU cores.
The refresh improved power efficiency by 5% and scalability from 8 cores to up to 12 cores. Additionally, the refresh could be configured with 32-bit support, whereas the original was 64-bit only.
Architecture comparison
"LITTLE" core
| uArch | Cortex-A53 | Cortex-A55 | Cortex-A510 | Cortex-A520 |
|---|---|---|---|---|
| Codename | Apollo | Ananke | Klein | Hayes |
| Peak clock speed | 2.3 GHz | 2.1 GHz | 2.0 GHz | 2.0 GHz |
| Architecture | ARMv8.0-A | ARMv8.2-A | ARMv9.0-A | ARMv9.2-A |
| AArch | 32-bit and 64-bit | 64-bit | ||
| Branch predictor history (entries) | 3072 | - | ||
| Max In-flight | None (In-order) | |||
| L0 (Mops entries) | None | |||
| L1-I + L1-D | 8/64+8/64 KiB | 16/64+16/64 KiB | 32/64+32/64 KiB | |
| L2 | 0–256 KiB | 0–512 KiB | ||
| L3 | None | 0–4 MiB | 0–16 MiB | 0–32 MiB |
| Decode Width | 2 | 3 | 3 (2 ALU) | |
| Dispatch | 8 |
Usage
The Cortex-A510 CPU core is used in the following SoCs