ARM Cortex-X4

The ARM Cortex-X4 is a high-performance CPU core from Arm, released in 2023 as part of Arm's "total compute solution". It serves as the successor of ARM Cortex-X3.

X-series CPU cores generally focus on high performance, and can be grouped with other ARM cores, such as ARM Cortex-A720 or/and ARM Cortex-A520 in a System-on-Chip (SoC).

Architecture changes in comparison with ARM Cortex-X3

The processor implements the following changes:

ARMv9.2
micro-op (MOP) cache removed (previously 1.5k entries)
Decode width: 10
Rename / Dispatch width: 10 (increased from 8)
Reorder buffer (ROB): 384 entries (increased from 320)
Execution ports: 21 (increased from 15)
Pipeline length: 10 (increased from 9)
Up to 2 MiB of private L2 cache (increased from 1 MiB)
DSU-120 Up to 14 cores (up from 12 cores) Up to 32 MiB of shared L3 cache (increased from 16 MiB)

Performance claims:

15% peak performance improvement over the Cortex-X3 in smartphones

(3.4GHz, 2MB L2, 8MB L3).

13% IPC uplift over the Cortex-X3, when based on the same process, clock speed,

and L3 cache (but 2 MiB L2 vs 1 MiB L2) setup (also known as ISO-process).

Architecture comparison

"Prime" core

uArch	Cortex-A78	Cortex-X1	Cortex-X2	Cortex-X3	Cortex-X4	Cortex-X925
Code name	Hercules	Hera	Matterhorn-ELP	Makalu-ELP	Hunter-ELP	Blackhawk
Architecture	ARMv8.2	ARMv9	ARMv9.2
Peak clock speed	~3.0 GHz	~3.3 GHz	~3.4 GHz	~3.8 GHz
Decode width	4	5	6	10
Dispatch	6/cycle	8/cycle	10/cycle
Max in-flight	2x 160	2x 224	2x 288	2x 320	2x 384	2x 768
L0 (Mops entries)	1536	3072	1536	0
L1-I + L1-D	32+32 KiB	64+64 KiB
L2	128–512 KiB	0.25–1 MiB	0.5–2 MiB	2–3 MiB
L3	0–8 MiB	0–16 MiB	0–32 MiB

ARM Cortex-X4

Architecture changes in comparison with ARM Cortex-X3

Architecture comparison

Usage

See also