ARM Cortex-A720
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The ARM Cortex-A720 is a CPU core model from Arm unveiled in 2023. It serves as a successor to the ARM Cortex-A715.
Cortex-A700 CPU cores series focus on balanced performance and efficiency, and the CPU core can be paired with other cores in its family such as the high performance ARM Cortex-X4 or/and high efficiency ARM Cortex-A520 in a CPU cluster. It can be used as either "big" or "LITTLE".
Architecture changes in comparison with ARM Cortex-A715
- Update to ARMv9.2
- 15% peak performance improvement over the Cortex-A715
- Can down to same size as Cortex-A78 with 10% performance improvement
- Area optimize configuration for no area cost vs Cortex-A78
- Down L2 cache hit latency to 9 cycles (from 10 cycles)
- Down mispredict latency to 11 cycles (from 12 cycles)
- x2 L2 bandwidth
- DSU-120 Up to 14 cores (up from 12 cores) Up to 32 MiB of shared L3 cache (increased from 16 MiB)
Architecture comparison
"big" core
| μArch | Cortex-A77 | Cortex-A78 | Cortex-A710 | Cortex-A715 | Cortex-A720 | Cortex-A725 |
|---|---|---|---|---|---|---|
| Codename | Deimos | Hercules | Matterhorn | Makalu | Hunter | Chaberton |
| Peak clock speed | 2.6GHz | ~3.0GHz | - | |||
| Architecture | ARMv8.2-A | ARMv9.0-A | ARMv9.2-A | |||
| AArch | - | 32-bit and 64-bit | 64-bit | |||
| Max In-flight | 160 | 160 | ? | 192+ | - | - |
| L0 (Mops entries) | - | 1536 | 0 | - | ||
| L1 (I + D) (KiB) | 64 + 64 KiB | 32/64 + 32/64 KiB | 64 + 64 KiB | |||
| L2 Cache (KiB) | 256–512 KiB | 128–512 KiB | 0.25–1 MiB | |||
| L3 Cache (MiB) | 0–4 MiB | 0–8 MiB | 0–16 MiB | 0–32 MiB | ||
| Decode width | 4-way | 5-way | ||||
| Dispatch | 6 Mops/cycle | 5 Mops/cycle | ? | - |
Usage
- Google • Tensor G4
- MediaTek • Dimensity 9300(+)
- Qualcomm • Snapdragon 6 Gen 4 • Snapdragon 7s/7+ Gen 3 • Snapdragon 8(s) Gen 3
- Samsung • Exynos 1580 • Exynos 2400
- • Cix P1/CD8180
See also
- ARM Cortex-X4, related high performance microarchitecture
- ARM Cortex-A520, related high efficient microarchitecture
- Comparison of ARMv8-A cores